Within microcontrollers, systems on chip devices, etc., certain peripherals may require a plurality of internal and external signals selected from one or more groups of internal and/or external signals. In conventional systems multiplexer are used to provide for such a selection. However, with an increasing number of possible candidates for such signals, the complexity of the multiplexer increases substantially and therefore these multiplexers consume valuable integrated circuit real estate. For example, to reduce the number of multiplexer, according to one example, it may be required that four (4) signals be selected from a constellation of 16 signals, but with the constraint that only 8-input multiplexers can be employed, maximizing the number of combinations that can be achieved and minimizing the cost of the silicon implementation of the multiplexers. Thus, each of the four signals is assigned one 8-to-1 multiplexer. However, this allows for each signal only a pool of eight signals. Thus, in an embodiment, each signal can be selected from a group of 8 source signals. If there are 16 source signals, then for example, two sets of 8-to-1 multiplexers would be assigned to the first eight signals and the other two to the second eight signals, which would allow only 2 signals from 2 groups.